High chances that if you are reading this blog, you must be preparing for the placement season. So before anything else, please take a few deep breaths and relax (at least till you complete this piece).
Having had tremendous fun and learning being a two-time CR, I applied and got elected as the General Secretary of the Electrical Engineering Department. I have also acted as a Teaching Assistant of the CS101 and BB101 introductory courses and an ISMP mentor to fourteen bright new students of IIT Bombay. My interests lie in the core electrical domain which prompted me to take up projects in the field, along with an internship with the Pre-Silicon Performance Team at Qualcomm. However, I could not secure a PPO offer which is ultimately led to me writing this blog
Placements v/s MS
Frankly, it was a very difficult decision. The uncertainty brought in by Covid19 along with the abysmal placements statistics for BTechs in core electrical students pushed me towards pursuing a masters and in a very short span, I gave the GRE and the TOEFL, scoring decent scores. Unfortunately/fortunately, the good scores made me quite capricious (had to throw in a GRE word, of course) since my application process now satisfied the “good scores” criteria. I then got into listing Univs and their programs. The semester continuous evaluations and the short time for placements to begin, however, made me ditch my Masters plan and prioritize placements.
Preparation
I was pretty sure that I wanted to have a future in core electrical, and that too in the digital domain. However, the core courses do not cover much of what the companies are looking for in their hires. For brief revision, I went through all the Prof. Patil’s slide-set available on his website, along with the notes of all the other digital courses. The course, VLSI Design, covers a lot of important stuff as well. I also referred to books like Morris Mano for covering the fundamentals. Important topics like FIFO length, setup-hold time, memory cells were studied too. These topics were pretty common in the internship interviews as well as placements interviews from previous years. Inter-IIT forums (the only inter-IIT I made to lol) were also created to share important placement material and information about the companies that were opening pan-IIT. Also cover the basics of various electronic devices like MOSFET, MOSCap, BJT, etc and their important circuits and applications.
The placement cell tests were pretty standard ones and I ensured that I scored just more than the cut-offs to get the respective points. The company tests would be highly directed to the company’s job profile so commenting on it generally wouldn’t make sense but please make use of the resources from seniors. I believe that the ‘beauty’ of the resume lies only in its content and not in what font you write it in or how much white space you see so I didn’t make many changes to my internship resume, except for adding new points from the internship. Ensure that you keep important projects at the strategic places (like the first page or the top of the second page). Although I had made 5 *different* types of resume for a variety of profiles, I ended up using just one resume throughout the process.
The Three
I got shortlisted for a number of core companies, primary among them being Google. I knew a close friend who had got placed there and she helped me prepare for the interviews in a very detailed fashion- Google likes to ask questions on the basics, looks for a positive applicant, asks to code a number of verilog codes (I learnt Verilog in just two days because Google prefers it over VHDL) and also how it massively prefers DD/MTech students over BTechs. My entire interview preparation was nothing but my Google interview prep. Google has three eliminative rounds of 45 minutes each. My interviews went, surprisingly, pretty well and I completed all the three levels, something which I hoped but did not expect, with the last interviewer being vocal about his liking my interview. I was also shortlisted for the Texas Instruments Embedded system role but I tanked the interview since I wasn’t prepared well for it. Being optimistic that Google would take me up (Google had hired one BTech student from IIT Kanpur), I was pretty saddened that I couldn’t make the cut. Day 2 also went into attending interviews for companies that didn’t particularly excite me, except the Enphase HW role. However, the Day 2 results were left unannounced and I went into Day 3 with what little hope that I had borrowed from my parents and a few close friends who stuck by me. In the morning, I had the Enphase Energy FW role interview- it covered questions on verilog, my project from Digital Image Processing (what it was exactly and how I implemented it), the Microprocessors project (how to mitigate hazards, the types of hazards, how was the architecture implemented, what were the shortcomings, etc) and my project on CNN (what it was exactly, how it was implemented and a few questions involving Python language). The interview also covered a number of coding questions using C language. Overall, I was pretty optimistic from this role as well. The interview for Micron was rescheduled from 7AM to 4PM and between which, I had already completed all the three rounds with Enphase. My Micron level 1 interview covered a lot more questions in verilog (for example, implementing D-flip flop with asynchronous reset and synchronous set) and few covering basics of digital as well as analog. I wasn’t very positive about my performance but was surprisingly called in for round 2. While I was in my second interview, I was oblivious to the fact that it was already announced that I had been selected by Enphase and I just kept giving my interview normally. It was hands down one of the best interviews I had in the placement season- I answered all the technical questions correctly, even all the personal questions. Moreover, the interviewer was genuinely enjoying the interview as well!
Climax
I got off the Micron level 2 interview and finally got hold of my phone- which was already flooded with congratulatory texts and a zillion missed calls (it took me 4-5 hrs to thank each one of them. To be honest, it felt really comforting that so many people were waiting for any good news for you). One of the many things that I will take away from my time here at institute will be the placement time. The days were so damn uncertain and difficult and people showed unshakeable brotherhood by not acting in any way that could hurt those who were still struggling (I saw hardly 1-2 congratulatory posts on Facebook in those three days. I know it was a highly debated issue, but I am sure I would have been very affected seeing so many students getting placed while I was preparing to wake up at 6AM the next morning for another day of uncertainty) The texts and calls of the dear ones to share words of support and encouragement were the only sources of motivation that kept me going.
As a parting note here, I would like to quote someone anon, “Placements turn boys into men”. To all those who are reading this, remember that your preparation will only take you up to Day 0 but tt is your support system that is going to pull you through the mess alive. Cherish these people. And I quote myself here, “Hope is what keeps the fire burning”
“Hope is what keeps the fire burning”
